Modeling of Gate Capacitance for Deep Sub-micron MOSFETs  

作　　者：DAI Yuehua CHEN Junning KE Daoming ZHU Dezhi XU Chao 

机构地区：[1]Institute of Electronic Science and Technology, Anhui University, Hefei 230039, China [2]No.38 Research Institute of China Electronics Technology Group Corporation, Hefei 230031, China

出　　处：《Chinese Journal of Electronics》2007年第3期435-438,共4页电子学报（英文版）

基　　金：This work is supported by the National Natural Science Foundation of China （No.60276042）.

摘　　要：With the scaling of MOSFET dimensions, the gate oxides become thinner. Due to the Quantum mechanical effects （QME＇s）, the carrier distributions in the silicon substrate and polysilicon electrodes play more important role for the gate capacitance. Based on improved triangular potential well approximation and least-squares curve fit, a simplified analytical model combined the impact of quantum effects in inversion and polysilicon gate regions is proposed. The results of the model are compared and verified with the numerical simulation.

关 键 词：Quantum mechanical effects Gate capacitance Inversion layer Polysilicon gate 

分 类 号：TN04[电子电信—物理电子学]