OFDM系统采样钟补偿算法及其FPGA实现  

Sampling Frequency Compensation Algorithm for OFDM Systems and its FPGA Implementation

作　　者：吴炜[1] 钱良[1] 徐友云[1] 

机构地区：[1]上海交通大学无线通信研究所,上海200240

出　　处：《电讯技术》2007年第4期32-36,共5页Telecommunication Engineering

基　　金：国家高技术研究发展计划(863计划)项目(2003AA123310)

摘　　要：利用数字内插滤波器完成全数字域采样钟同步已广泛应用于OFDM数字接收机中。文中利用两个Farrow结构的内插滤波器,同时提高工作时钟对过采样信号进行数字域内插,完成接收端和发送端之间的采样时钟的完全匹配,并且根据硬件器件的特性和算法结构,逐级进行模块变量定点处理。基于实测数据的分析表明,该FPGA数字域采样钟补偿算法不仅有稳定的性能,而且其模块化设计也有利于更高阶算法或多通道系统的实现。Digital interpolation filter has been widely used in sampling frequency synchronization of all digital OFDM receivers. In this paper, two Farrow -structured filters are used to implement the digital interpolation of the oversampling signals with increased clock. The variables are clipped with consideration of the features of the chips and the algorithm structure. The analysis of the data based on real test shows that this sampling frequency offset compensation algorithm implemented in digital domain with FPGA has stable performance, and such modularized design can also be used in the implementation of higher order algorithms or muhichannel systems.

关 键 词：OFDM系统 数字接收机 内插 采样钟同步 Farrow滤波器 

分 类 号：TN929.53[电子电信—通信与信息系统]