H.264及AVS双模视频解码器中帧内预测的硬件设计与实现  

Design and implementation of intra prediction in H.264 & AVS video decoder

作　　者：姜弢 周佩海[1] MIN Bahadur K.C 

机构地区：[1]哈尔滨工程大学,黑龙江哈尔滨150001

出　　处：《电子技术应用》2007年第9期41-44,共4页Application of Electronic Technique

摘　　要：根据H.264/AVC及AVS的特点,设计出一种适合于帧内预测解码的硬件实现方式,并根据H.264和AVS帧内预测运算上的相似性提出了基于可重构的并行结构,有利于提高解码速度,并将该结构配合其他设计好的解码器模块,在FPGA上实现了高准清晰度的H.264及AVS视频的实时解码。Based on video coding standards in H.264/AVC＆AVS,this paper introduces the design method of Intra prediction in video decode system and proposes a reconfigurable parallel intra predictor according to the similarity of the predicting operations. The way can improve the speed and the efficiency of decoding.At the same time,This part togeders with others of decode system can perform real-time decoding of H.264＆AVS on FPGA. K

关 键 词：H.264 AVS 帧内预测 视频解码系统 

分 类 号：TN919.81[电子电信—通信与信息系统]