专用指令集安全处理器设计与VLSI实现  

Design and VLSI Implementation of an Application Specific Instruction Set Security Processor

作　　者：陆荣华[1] 曾晓洋[1] 韩军[1] 顾叶华[1] 麦浪[1] 

机构地区：[1]复旦大学专用集成电路与系统国家重点实验室,上海201203

出　　处：《小型微型计算机系统》2007年第9期1724-1728,共5页Journal of Chinese Computer Systems

基　　金：国家"八六三"高技术项目(2003AA1Z1270)资助;上海市科委重大攻关项目(03dz15001)资助

摘　　要：专用指令集处理器(ASIP)结合了ASIC协处理器的高效性与通用处理器的灵活性,在信息安全领域具有广泛的应用前景.本文针对RSA/ECC密码算法,提出了一种专用指令集安全处理器的设计与VLSI实现方案.本文的ASIP基于32位RISC架构,通过采用专用的指令集和特殊的运算单元,以较小的软硬件代价实现了密码算法的高效运算.本设计采用TSMC0.25μm标准CMOS工艺综合,核心电路等效门为28K,最高时钟频率可达到150MHz,完成一次1024位RSA算法仅需200毫秒.The ASIP, which features the high efficiency of ASIC co-processor and the flexibility of General Purpose Processor, has and will have popular application in information security domain. This paper presents a new design and VLSI architecture of Security ASIP for RSA/ECC of cryptographic algorithms. By adopting the special intruction set and computing unit, the proposed 32-bit RISC processor achieves the goal of high-speed and low-cost. Based on TSMC 0. 25μm standard CMOS technology, the core circuit of this Security ASIP has about 28k gates, and a max frequency of 150MHz , under which only 200 ms is required when the Security ASIP excutes a 1024-bit RSA algorithm.

关 键 词：专用指令集处理器 RISC RSA ECC 安全 

分 类 号：TP309[自动化与计算机技术—计算机系统结构] TN918[自动化与计算机技术—计算机科学与技术]