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作 者:叶强[1] 来新泉[1] 代国定[1] 王辉[1] 许录平[1]
机构地区:[1]西安电子科技大学电路CAD所,西安710071
出 处:《Journal of Semiconductors》2007年第9期1477-1481,共5页半导体学报(英文版)
基 金:国家自然科学基金(批准号:60172004);西安应用材料创新基金(批准号:XA-AM-200504)资助项目~~
摘 要:在D类功率放大器的设计中,为了提高驱动效率,需要一个高电平驱动H桥的高端LDNMOS管.文中设计了一种新颖的适用于D类功放的驱动电路,在芯片内部采用一个电荷泵电路.当芯片正常工作时,H桥低端LDN-MOS管的驱动电平通过较大的电荷泵电容稳定在5.5V左右,H桥高端LDNMOS管的驱动电平通过自举电容高达18.8V,从而实现对D类功放H桥高端的驱动,这样既提高了驱动效率,又减少了对外部多个电源的需求.采用此电路的一款3-W的立体声D类功放已在TSMC06BCD工艺线投片,芯片效率高达89.67%,H桥高端和低端的导通电阻为320mΩ,电源抑制比(PSRR)为-62dB,THD低至0.1%,测量结果表明该驱动电路工作良好.In order to improve driver efficiency,a high power supply in the design of class-D audio power amplifiers is needed to drive the high-side LDNMOS of H-bridges. A novel driver circuit is presented to solve this problem. A charge pump circuit is used in the design. With the operation of the chip, the power supply for the low-side LDNMOS transistor of the H-bridge is clamped at 5.5V by a charge pump capacitor, and the power supply for the high-side LDNMOS transistor of the H-bridge reaches 18. 8V by a bootstrap capacitor. The bootstrapped power supply minimizes the number of high-voltage power-supply levels externally supplied to the system and improves the efficiency. A stereo class-D audio power amplifier with this circuit is implemented in a TSMC06BCD process. The results indicate that its efficiency could be as high as 89. 67% ,and the high-side and low-side R DSON is 320mΩ, PSRR is -62dB, and its THD is as low as 0. 1%. This shows that the circuit works effectively.
分 类 号:TN722.75[电子电信—电路与系统]
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