LS-DSP路由器的低功耗设计  

Low Power Design of Router for LS-DSP

作　　者：李剑川[1] 王忠[1] 车德亮[1] 

机构地区：[1]西安微电子技术研究所

出　　处：《国防科技大学学报》2007年第4期52-56,共5页Journal of National University of Defense Technology

基　　金：国家863高技术计划项目(2002AA714022);国家部委资助项目(41308010203)

摘　　要：LS-DSP是用于航天图像处理的数字信号处理器,内部的协处理器由处理元PE阵列构成。路由器则是实现PE阵列网格互连的专用部件,也是操作最频繁的部件。如何降低处理器功耗,提高算法的执行效率是一个非常重要的研究课题。针对LS-DSP路由器的电路进行门控时钟的低功耗设计改进,并以算法为例进行了控制、执行过程功耗分析和比较。实验结果表明,改进结构的路由器降低功耗76%。LS-DSP,of which the inner coprocessor is composed of process unit PE,is a Digital Signal Processor used for aerospace image processing.Router is a special unit which interlinks PE net array,and it is also the part most frequently used for operation.How to depress power of processor and elevate calculate efficiency is an important topic for research.Aimed at a low power improvement in the circuit of LS-DSP router,a design base on clock-gating was carried out,and the algorithm was taken as an example to make the power consumption analysis and comparison of the control and operation process.The experimental results show that the improved architecture can reduce the router power consumption by 76%.

关 键 词：DSP 路由器 低功耗 门控时钟 

分 类 号：TP393[自动化与计算机技术—计算机应用技术]