视频格式转换芯片中帧频提升算法及硬件实现  

Hardware implement and algorithm of frame rate up-conversion integrated in a video format conversion chip

作　　者：王南飞[1] 姚素英[1] 陆尧[1] 史再峰[1] 

机构地区：[1]天津大学电信学院专用集成电路设计中心,天津300072

出　　处：《电子测量技术》2007年第8期14-16,62,共4页Electronic Measurement Technology

基　　金：天津市科委科技攻关项目(043184511)资助

摘　　要：帧频提升算法因算法复杂、运算量大,一直是视频格式芯片硬件实现中的难点所在,针对国内同类型芯片因搜索方法的不足,造成的在某些特殊运动下图像效果差,提出了一种基于全搜索块匹配运动估计的帧频提升算法。另外通过加权重相关系数,有效地消除了噪声,通过自适应滤波插值算法,使算法具有更广泛的适应性,并且提供一种基于流水线、串并结合和DDA(Digital Differential Analyzer,数字微分分析)算法的硬件实现结构。最后,整个设计通过了FPGA验证,并且图像效果良好。Frame rate up-conversion is always regarded as the difficulty in the hardware implement when designing the video format conversion chip for its heavy calculation and complex algorithm. To deal with the shortage of search technique in the same type chip, which causes unacceptable image quality at same special move types, a frame rate up- conversion algorithm based on full-search block matching interpolation is proposed. In additional, combining serial and parallel and DDA algorithm, eliminate noise is fulfilled by adding weighted correlation index, self-adaptive interpolation is adopted to enlarge more use, and the hardware implement architecture is used based on pipelining. Finally, the design is validated by FPGA,and the image is good.

关 键 词：视频格式转换芯片 帧频提升 块匹配 硬件实现 DDA 

分 类 号：TN941.3[电子电信—信号与信息处理]