基于FPGA的32Kbit/s CVSD语音编解码器的实现  

Implementation on 32 Kbit/s CVSD Voice Encoder and Decoder Based on FPGA

作　　者：陈普跃[1] 潘克修[1] 

机构地区：[1]解放军理工大学通信工程学院研究生二队,江苏南京210007

出　　处：《电声技术》2007年第9期30-32,共3页Audio Engineering

摘　　要：介绍了连续可变斜率增量调制(CVSD)的基本原理,并提出了32Kbit/sCVSD语音编解码器的现场可编程门阵列(FPGA)实现方法,给出了影响CVSD性能的关键参数。该语音编解码器消耗硬件资源少,语音效果理想,适用于无线语音系统。The fundamental principle of encoder and decoder based on CVSD（Continuous Variable Slope Delta） modulation is introduced. A method of implementing 32 Kbit/s CVSD voice encoder and decoder based on FPGA is proposed. Key parameters to decide the performance of CVSD system are obtained. The design of encoder and decoder consumes little resource with good performance, and is fit for wireless voice system.

关 键 词：连续可变斜率增量调制 现场可编程门阵列 语音编码 有限脉冲响应 

分 类 号：TN912[电子电信—通信与信息系统]