基于量子进化算法的SoC测试结构优化  

Optimization of SoC test architecture based on quantum-inspired evolutionary algorithm

作　　者：许川佩[1] 王征[1] 李智[1] 

机构地区：[1]桂林电子科技大学电子工程学院

出　　处：《仪器仪表学报》2007年第10期1792-1799,共8页Chinese Journal of Scientific Instrument

基　　金：国家自然科学基金(60266001;60766001);广西自然科学基金(桂科自10542051)资助项目

摘　　要：本文针对SoC测试结构的特点,采用多进制的编码方式,建立改进的量子进化算法数学模型。通过选取合适的模型参数,以缩短测试时间为目标,完成对群体的观测,确定IP核在测试访问机制上的分配以及当前群体中的最佳个体,实现基于量子进化算法的片上系统芯片的测试结构优化。针对国际标准片上系统芯片验证表明,量子进化算法可应用于多扫描链IP核构成的包含多条TAM的SoC测试,与同类算法相比,该算法能够获得较短的测试时间。By adopting multi-band coding, this paper constructs the mathematical model of improved quantum-inspired evolutionary algorithm for SoC test architecture. By choosing appropriate model parameters to reduce test time, the observation of the swarm state is accomplished ; the assignment of IP core on test access mechanism and the best chromosome in current swarm are determined. Then the optimization of SoC test architecture is completed based on quantum-inspired evolutionary algorithm. The experimental results for SoC benchmark show that the quantum-inspired evolutionary algorithm can be applied to SoC test that consists of multiple scan chains and includes a number of TAMs. Compared with other similar algorithms, the proposed algorithm can achieve shorter test time.

关 键 词：量子进化算法 测试结构 SOC 

分 类 号：TN47[电子电信—微电子学与固体电子学]