二维提升小波变换的FPGA结构设计  

FPGA Architecture Design of 2D-lifting Wavelet Transform

作　　者：崔巍[1] 汶德胜[1] 马涛[1] 

机构地区：[1]中科院西安光学精密机械研究所

出　　处：《计算机工程》2007年第15期261-263,共3页Computer Engineering

摘　　要：根据提升小波的框架结构,提出了一种基于JEPG2000的二维多级提升小波变换核的FPGA设计。采用分时复用和流水结构,充分利用FPGA片内存储资源,实现了行列变换的并行执行。在保证精度的前提下采用优化的移位加操作代替浮点乘运算,加快了运算速率,减小了电路规模。同时通过乒乓操作完成FPGA和片外SDRAM间数据的无缝缓冲处理,保证了多级变换的高效实时并行,从而达到各级小波系数的快速并行输出。系统经验证完全满足图像实时处理的要求,为后续实时压缩编码和传输提供了有利条件。According to the framework of wavelet transform, the FPGA architecture design of 2D-lifting wavelet transform based on JEPG2000 is proposed, which works based on row scan fashion for input. The whole architecture is optimized in time division multiplex （TDM） and the pipeline designs and takes full advantage of the memory bits in FPGA, which leads to row and column processor work in parallel way. Multiplication is substitute for shift-add operations to get higher hardware utilization and speed. The SDRAM controller realizes seamless buffering between FPGA and SDRAM with ping-pong operation, which can ensure multilevel transform achieve high-efficient, real time and parallel pipelined output. Simulations illustrate that it possesses strong processing ability and low power consumption in real time image processing and creates good condition for coding and transmission.

关 键 词：JEPG2000 提升小波变换 并行结构 乒乓操作 FPGA 

分 类 号：TN919.8[电子电信—通信与信息系统]