一种基于改进锁相环的谐波分析逻辑电路  

Logic Circuit for Harmonic Analysis Based on Enhanced PLL

作　　者：李根[1] 庞浩[1] 徐健飞[1] 王赞基[1] 

机构地区：[1]清华大学电机系电力系统国家重点实验室,北京市100084

出　　处：《电力系统自动化》2007年第21期82-85,共4页Automation of Electric Power Systems

摘　　要：改进锁相环(EPLL)相比传统锁相方法具有快速、稳定的优点。基于EPLL输出的同步倍频信号可以将异步采样数据同步化,再通过基于准同步采样数据的快速傅里叶变换,最终可以在快速实现信号跟踪的基础上获得精确的谐波分析结果。文中完成了这种基于EPLL的谐波分析逻辑电路设计,并在FPGA器件中得到了实现和验证。此外,还研究了非等间隔采样、异步采样数据同步化以及定点数运算对该谐波测量方法精确度的影响。所设计的逻辑电路已经应用于一款具有谐波分析功能的电能计量芯片的开发中。The enhanced PLL （EPLL） has more advantages in speed and stability than the general phase-locked loop. The synchronous signals of multiple frequencies generated by the EPLL can synchronize the asynchronous data. After the quasisynchronous data is processed in the FFT module, the accurate results of the harmonic analysis can be rapidly obtained. A logic circuit using the EPLL is proposed for the whole process of harmonic analysis. The circuit has been implemented in FPGA. Influences of three main error sources in harmonic analysis accuracy, including the sampling in different spaces, the transformation from asynchronous data to synchronous data and the truncation errors in fixed-point arithmetic, are investigated. The logic circuit has been utilized in a power measuring chip with harmonic analysis.

关 键 词：谐波分析 锁相环 快速傅里叶变换 同步采样 

分 类 号：TN791[电子电信—电路与系统] TM711[电气工程—电力系统及自动化]