用于跳变故障测试的确定性逻辑内建自测试方法  

Deterministic logic built-in self-test technique for transition fault testing

作　　者：王颖[1] 陈禾[1] 

机构地区：[1]北京理工大学电子工程系,北京100081

出　　处：《电子测量技术》2007年第10期54-57,共4页Electronic Measurement Technology

摘　　要：BIST由于支持全速测试而成为延迟故障测试中引人关注的技术。确定性逻辑BIST(DLBIST)已成功应用于固定故障的测试中。由于DF的随机可测试性低于固定故障,故需要对DLBIST方法进行修改。DF测试需要测试向量对,因而与SAF相比,需要更多的映射与逻辑开销。本文针对广泛应用的所谓跳变故障模型,提出了用于跳变故障测试的DLBIST扩展方法,使用FJ产生向量对。实验结果表明,使用本文方法可以获得较高的故障测试效率。BIST is an attractive approach to detect delay faults due to its inherent support for full speed test. Deterministic logic BIST （DLBIST） technique has successfully been applied in stuck-at fault testing. As delay faults have lower random pattern testability than stuck-at faults, the DLBIST schemes need modification. Since delay fault necessitates the application of pattern pairs, consequently delay fault testing is expected to require a larger mapping effort and logic overhead than stuck-at fault testing. We present an extension of a DLBIST scheme for transition fault testing aiming at the so-called transition fault model Functional justification is used to generate the required pattern pairs. The experimental results indicate that we can obtain higher fault efficiency by using the scheme proposed in this paper.

关 键 词：确定性逻辑BIST 延迟故障测试 跳变故障 

分 类 号：TN407[电子电信—微电子学与固体电子学]