面向CMP体系结构的二级CACHE替换算法设计  

Design of L2 CACHE Replacement Arithmetic for Chip Multiprocessor Architecture

作　　者：张骏[1] 樊晓桠[1] 刘松鹤[2] 

机构地区：[1]西北工业大学计算机学院,陕西西安710072 [2]长安大学信息工程学院,陕西西安710064

出　　处：《小型微型计算机系统》2007年第12期2277-2281,共5页Journal of Chinese Computer Systems

基　　金：国家自然科学基金项目(60573107)资助;国家自然科学基金项目(60573143)资助

摘　　要：片上多处理器体系结构(CMP)能够有效地挖掘程序线程级和指令级的并行性.典型的CMP体系结构中二级CACHE被多个处理器内核共享,这提高了二级CACHE利用率并且能避免复制存储器硬件资源.但内核的分支误预测导致错误路径上的LOAD缺失向共享的二级CACHE中写入无用数据,造成二级CACHE的污染.这降低了其他内核对二级CACHE空间的占用率,增加了二级CACHE缺失率,引起了存储资源在线程间分配的不均衡,甚至导致线程饥饿,影响处理器的整体性能.本文提出一种适用于CMP处理器的轻污染二级CACHE替换算法,优先将这些错误路径上的数据替换出去,缓解了二级CACHE污染对性能造成的影响.Chip Multi-Processor exploits both instruction-level and thread-level parallelism effectively. In a typical Chip MultiProcessor architecture, L2 Cache is shared by multiple cores. Sharing the L2 Cache allows high Cache utilization and avoids duplicating Cache hardware resources. Unfortunately, the mis-predictions of any processor core could lead the load miss from the wrong path to write some useless data into the shared 1.2 Cache, and cause L2 Cache pollution, This may increase additional Cache misses and impacts performance of other threads for failing to occupy sufficient L2 Cache space, and even cause starvation. This paper proposes a light Pollution replacement arithmetic, coiled LPR, which priorities swapping of wrong path data to eliminate the pollution caused by the execution of the wrong path load instructions as soon as possible. Simulation results show that LPR improves the performance of a CMP architecture due to the reductions in the number of Cache misses.

关 键 词：片上多处理器 高速缓存 替换算法 

分 类 号：TP303[自动化与计算机技术—计算机系统结构]