AVS标准中整数DCT变换快速算法的硬件设计  

A fast hardware algorithm design of integer DCT transform used in AVS

作　　者：蔡海涛[1] 刘荣科[1] 

机构地区：[1]北京航空航天大学电子信息工程学院,北京100083

出　　处：《电子技术应用》2007年第12期68-71,75,共5页Application of Electronic Technique

摘　　要：介绍了AVS标准中整数DCT变换矩阵的化简方法,该方法提高了一维整数DCT变换硬件实现的速度。基于此一维整数DCT变换,采用模块复用和流水线设计,实现了二维整数DCT直接变换在一个时钟周期内完成,工作频率可达160MHz。仿真结果证实了该算法的有效性。The way to simplify the DCT transform matrix is introduced in this paper. According to this way, the processing speed of 1_D integer DCT is improved. Based on this 1_D DCT transformation and the techniques of parallel architecture design and module reusing, we can get 2_D integer DCT＇s direct fast implementation. The whole 8×8 integer DCT can be achieved in one clock cycle and the working frequency can arrive at 160 MHz. The simulation results prove this algorithm effective.

关 键 词：视频压缩AVS整型变换DCT变换 

分 类 号：TN919.81[电子电信—通信与信息系统]