降压型PWM DC/DC中的峰值电流环电路的设计  

Design of Peak Current Loop in Bucking PWM DC/DC

作　　者：应建华[1] 谢金纯[1] 罗鸣[1] 

机构地区：[1]华中科技大学电子科学与技术系,湖北武汉430074

出　　处：《通信电源技术》2007年第6期15-18,共4页Telecom Power Technology

摘　　要：设计了一种用于PWM降压型DC/DC的峰值电流环电路,详细地阐述了电路工作原理以及相关计算公式,设计了与之配套的功率管MOSFET的版图布局布线。该电流检测与信号放大电路结构简单,比传统的设计更精确地反映了峰值电流的大小。仿真结果表明,电路的电源调整率达到0.1%;在较大的电源范围内(4.75V^15V)增益保持不变。A peak current loop circuit of bucking PWM DC/DC converter is designed, principle of the circuit and the compute method is expatiated in detail, and the special layout of MOSFET power switch design has been given. The configuration of this peak current sensor and signal amplifier circuit is very simple and convenient, and can more accurately sense the value of peak current than tradition circuit. According to the test, performance is up to grade.

关 键 词：降压型PWM DC/DC 峰值电流检测 电源调整率 

分 类 号：TM46[电气工程—电器]