基于总线共享架构的片上多处理器系统性能探索  

Exploring Performance of Shared-Bus-Based Multi-Processor System on a Chip

作　　者：杨盛光[1,2] 李丽[1,2] 徐懿[1,2] 张宇昂[1,2] 张冰[1,2] 

机构地区：[1]南京大学微电子设计研究所 [2]南京大学江苏省光电信息功能材料重点实验室,江苏南京210093

出　　处：《微电子学与计算机》2007年第12期16-19,共4页Microelectronics & Computer

基　　金：国家自然科学基金项目(90307011;60576034;60373076)

摘　　要：采用SystemC建立了一个基于共享总线的MPSoC仿真平台,设计了3个实验分别用于建模3种典型应用(低计算/通讯比、高计算/通讯比和非独立任务),对系统性能进行了详细的调研。实验结果显示:处理器数≤6时,总线架构MPSoC体现出很高的效率,而处理器数=16几乎达到了总线架构MPSoC适用规模的极限;计算/通讯比对性能和规模有重要影响;流水线方案能略微缓解通讯状况。建议:处理器数≤6时,推荐采用总线方案;6<处理器数≤16时,总线方案是否合适由任务计算/通讯比决定;处理器数>16时,需要采用更高级的通讯方案。Shared-bus based multi-processor system on a chip （MPSoC） is one of the most popular solutions to multimedia application featured as parallel computation. Otherwise, sequential assess mechanism of bus imposes limitations and negative effects on the performance and scale of MPSoC. So, it is very meaningful to explore the performance of Shared-bus based MPSoC. In this paper, we setup a MPSoC simulation platform based on shared-bus and carry out a lot of experiments on the platform. As a result, we get a conclusion about the efficiency of the MPSoC and the impact of applications on performance improvement of MPSoC. It demonstrates bus-based MPSoC shows high efficiency when N≤ 6 and almost reaches its limit when N=16.

关 键 词：片上多处理器系统 总线 加速比 单核效率 总线占用率 

分 类 号：TP393.02[自动化与计算机技术—计算机应用技术]