显示控制CMOS锁相环频率合成器设计  

Design of CMOS PLL Frequency Synthesizer for Video Graphics

作　　者：张涛[1] 邹雪城[2] 沈绪榜[3] 

机构地区：[1]武汉科技大学信息学院,武汉430081 [2]华中科技大学电子科学与技术系,武汉430074 [3]中国航天科技集团九院771所,西安710054

出　　处：《半导体技术》2008年第1期6-10,共5页Semiconductor Technology

基　　金：国家重点预研资助项目(413010701-3)

摘　　要：从工程的角度出发,设计了一个应用于显示控制芯片的新颖实用的CMOS锁相环频率合成器。详细论述了系统设计的关键问题,研究了电荷泵充放电电流匹配、精度和输出电压等工程设计问题,并对环路滤波器的计算和仿真以及压控振荡器的噪声性能进行了研究。采用1st Si0.25μm的CMOS混合信号工艺对整个电路系统进行了带版图寄生的后仿真,仿真结果表明锁相环频率合成器设计的正确性。A novel PLL frequency synthesizer for video graphics was designed from the viewpoint of engineering. The key problems in system design were discussed. The engineering design problems of charge pump, such as current matching, current accuracy and output voltage, were studied, and a novel applied charge pump was designed. Computation and simulation of loop filter were researched. The novel appliable voltage-controlled oscillator was designed, noise performance of VCO was simulated. The circuit was implemented using 1st Si 0.25 ktm mixed-signal CMOS process, and post simulation results show that the design of PLL frequency synthesizer is correct.

关 键 词：锁相环 频率合成器 鉴频鉴相器 电荷泵 压控振荡器 

分 类 号：TN432[电子电信—微电子学与固体电子学]