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出 处:《半导体技术》2008年第1期39-41,共3页Semiconductor Technology
摘 要:同步开关噪声(SSN)对具有上百个输入/输出端口的高性能FPGA系统具有很大的影响,已经成为深亚微米设计所必须考虑的主要问题之一。由于没有考虑电压反馈效应,IBIS模型在仿真SSN时,总是过高估计电源噪声、地噪声和静线噪声。为提高IBIS模型仿真SSN的精度提出了一种改进的方法,利用自研发的工具SSWI(SSN simulation withIBIS)获得了自动IBIS优化模型。利用美国北卡州立大学开发的工具S2IBIS直接从SPICE模型中提取了IBIS模型,与SPICE模型仿真结果验证了该方法的有效性,采用该法可以提高IBIS模型仿真SSN的精度60%~70%。Simultaneous switch noise (SSN) has great impact on high performance FPGA with hundreds of I/O ports, and is already one of the main considerations in deep sub-micron design. IBIS model overestimates power noise, ground noise and quiet line noise when simulate SSN. Since IBIS model fails to take into account signal feedback effect in real circuit, a new improved IBIS model was proposed, and a toolkit named SSWI to determine this improved IBIS model automatically was developed. The IBIS models were created using the S2IBIS tool from North Carolina State University. By comparing with the simulation result of SPICE model, the effectiveness of this method was derived. It is found that this method can improve the simulation accuracy by 60 % - 70 % .
关 键 词:IBIS模型 SPICE模型 信号完整性 同步开关噪声
分 类 号:TN702[电子电信—电路与系统] TN911.4
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