基于高速数模转换器的通用雷达信号模拟器的设计  

Design of General Radar Signal Simulator Based on High-speed DAC

作　　者：王倩[1] 李燕[1] 王虹现[1] 邢孟道[1] 

机构地区：[1]西安电子科技大学雷达信号处理国家重点实验室,陕西西安710071

出　　处：《电子科技》2008年第1期21-24,共4页Electronic Science and Technology

摘　　要：针对雷达设计调试困难的问题,提出一种通用雷达信号模拟器的设计方案,以一个FPGA和两个高速DA芯片为核心,另外配置大容量存储器。目标及环境数据采用DDS方法产生或通过外部接口加载,再经过DAC输出雷达回波信号,供雷达信号处理机调试使用,文中给出了模拟器应用实例。To solve the problem of radar design and debug, a design the radar signal simulator based on two high speed D/A and a FPGA is advanced. Object and circumstance data are generated by DDS methods or transferred through external interface, then the data are converted by DAC into radar echo signal for radar signal processor. An example is given of the application of the simulator in the development process of a radar signal processor.

关 键 词：雷达信号模拟器 FPGA DAC CPCI 

分 类 号：TN911.71[电子电信—通信与信息系统]