Function electrical stimulation circuit for neural signal regeneration system  

用于神经信号再生的神经功能电压驱动电路(英文)

作　　者：王珏[1] 李文渊[1] 王志功[1] 

机构地区：[1]东南大学射频与光电集成电路研究所

出　　处：《Journal of Southeast University(English Edition)》2007年第4期512-515,共4页东南大学学报（英文版）

基　　金：The National Natural Science Foundation of China(No90377013)

摘　　要：A low-power, high-gain circuit for function electrical stimulation （FES） is designed for the microelectronic neural signal regeneration system based on CSMC （CSMC Technologies Corporation） 0. 6μm CMOS （complementary metal-oxide-semiconductor transistor） technology. It can be used to stimulate microelectrodes connected with the nerve bundles to regenerate neural signals. This circuit consists of two stages： a full differential folded-cascode amplifier input stage and a complementary class-AB output stage with an overload protection circuit. The rail-to-rail input and output stages are used to ensure a wide range of input and output voltages. The simulation results show that the gain of the circuit is 81 dB; the 3 dB-bandwidth is 295 kHz. The chip occupies a die area of 1.06 mm × 0. 52 mm. The on-wafer measurement results show that under a single supply voltage of ＋ 5 V, the DC power consumption is about 7. 5 mW and the output voltage amplitude is 4. 8 V. The chip can also mn well under single supply voltage of ＋ 3.3 V.采用华润上华0.6μm CMOS工艺,设计实现了一种用于神经信号再生微电子系统的低功耗、高增益功能电激励电压驱动电路.它可以用于驱动激励电极和与之相连的神经来再生神经信号.电路由2部分组成:全差分折叠式共源共栅放大器及带过载保护的互补型甲乙类输出级.电路采用了满摆幅的输入输出结构,保证了大输入电压范围和大输出电压范围.仿真结果表明,电路增益可以达到81dB,具有295kHz的3dB带宽.芯片面积为1.06mm×0.52mm.经流片实现后在片测试,在单电源+5V下工作,直流功耗约为7.5mW,输出电压幅度达到4.8V;同时在单电源+3.3V下也可正常工作.

关 键 词：LOW-POWER RAIL-TO-RAIL neural signal voltage drive 

分 类 号：TN432[电子电信—微电子学与固体电子学]