高精度流水线A/D转换器误差分析与系统设计  

Error Analysis and System Design of High-Accuracy Pipelined A/D Converters

作　　者：陈廷乾[1] 许俊[1] 朱凯[1] 周立人[1] 任俊彦[1] 

机构地区：[1]复旦大学专用集成电路与系统国家重点实验室,上海201203

出　　处：《微电子学》2008年第1期125-128,共4页Microelectronics

基　　金：国家自然科学基金资助项目(90407003)

摘　　要：详细分析了影响高精度流水线A/D转换器性能的主要误差,并用数学表达式来具体描述。这些误差是模块噪声、恒定余量增益误差、非恒定余量增益误差、放大器不完全建立误差。在误差分析的基础上,研究了系统设计指标的确定方法,像如何确定各模块的采样电容与模块间电容缩小比例,以及如何确定各模块中放大器的增益、带宽、摆率等。Main errors that affect the performance of high-accuracy pipelined A/D converter were analyzed in detail, and the analysis in mathematical expressions was presented. The main error sources are from noise of circuit blocks, constant residue gain error, variant residue gain error and incomplete settling error of amplifiers. Based on the error analysis, methods to determine system design specifications, such as values and scaling factors of sampling capacitors in blocks, and the requirement of gain, bandwidth and slew-rate of amplifiers, were analyzed.

关 键 词：模数转换器 流水线 误差分析 系统设计 

分 类 号：TN402[电子电信—微电子学与固体电子学]