基于FPGA虚拟数字示波器的设计  

Design of Virtual Digital Storage Oscilloscope Based on FPGA

作　　者：张梦麟[1] 李念强[1] 李萍[1] 

机构地区：[1]济南大学信息科学与工程学院,济南250022

出　　处：《自动化与仪表》2008年第2期8-11,共4页Automation & Instrumentation

基　　金：山东省教育基金支持项目(SJ0410)

摘　　要：介绍了一种虚拟数字存储示波器的设计原理与实现。该示波器是以高速数据采集技术为基础,具有示波和数据采集的功能。底层硬件由预处理电路、AD转换器、时钟发生器和集成于FPGA芯片的SDRAM控制器、逻辑控制器、接口控制器组成,通过PXI总线与PC机主板连接,顶层软件有NI公司生产的Labwindows/CVI测控软件实现。设计采用了128MB同步动态存储器,存储容量大、成本低、速度快,可广泛用于高速、大容量数据采集、示波的场合。This paper introduce the chief techniques and design principles of an virtual digital storage oscilloscope based on high-speed data acquisition techniques,which has two working modes ：oscilloscope and data acquisition. The hardware instrument consists of preprocessing circuit,AD converter on board memories,high speed clock generator and control circuit integrated in FPGA,comected with PC board through PXI CAN. the software is developed by Labwindows/CVI produced by NI corpration. The design uses 128MB synchronous dynamic storage,which is of character of large memories,low cost,high speed,h can be comprehensively applied in occasion with high-speed,large storage data acquisition,and oscilloscope.

关 键 词：虚拟数字示波器 高速数据采集 现场可编程门阵列 Labwinddows/CVI 

分 类 号：TP39[自动化与计算机技术—计算机应用技术]