FPGA实时实现PGA算法的研究  

Research on Real-Time Realizing PGA Algorithm in FPGA

作　　者：郝智泉[1] 王贞松[1] 刘波[1] 

机构地区：[1]中国科学院计算技术研究所

出　　处：《计算机研究与发展》2008年第2期342-347,共6页Journal of Computer Research and Development

基　　金：国家自然科学基金项目(60303017)

摘　　要：合成孔径雷达(SAR)成像具有数据量巨大、算法比较复杂等特点.如何实时实现SAR成像的相关算法是嵌入式高性能计算领域一个值得研究的问题.FPGA以其高性能、可重构等优势,被越来越多地应用到嵌入式高性能计算领域中作为一种高效低成本的解决方案.针对SAR成像中多普勒调频率估计的经典算法——PGA算法,以FPGA作为实现平台,通过对算法的本质的挖掘,提出了适于FPGA实时实现的对于经典算法的改进算法.同时也阐述了将改进算法映射到FPGA实现的设计过程.实验结果表明,改进的算法较经典的PGA算法明显地减少了迭代次数,在SOC中通过硬件的运算精度能够满足系统的要求.Synthetic aperture radar （SAR） image has some common features such as huge data volume, relative complex algorithm, etc. Realizing SAR image algorithm is worthy of being studied in the domain of EHPC （embedded high performance computing）. FPGA is used as a high efficient and low cost solution in EHPC for its high performance and reconfigurable ability. A new phase gradient autofocus （PGA） algorithm for real time case is proposed, which can achieve convergence focusing quality with less iteration and fewer computation loads than the classic PGA algorithm. The principle of how to map the improved algorithm to FPGA architecture is discussed. Some key computing components abstracted from the algorithm, such as CORDIC processor, complex vector correlator and prominent scatter filter are also discussed. The motivation and aim of this work is to develop a numerically efficient, accurate and robust Doppler rate estimator with reasonable architecture in FPGA, which can be used in a high-throughput-rate processor for future onboard imaging system. Because logic resources are effectively used, constraints on volume, weight, and power are easier to meet without sacrifice of losing real-time performance. Experiment result indicates that the improved algorithm reduces iteration times and the precision can satisfy the imaging system.

关 键 词：SAR 嵌入式高性能计算 相位梯度 自聚焦 FPGA 

分 类 号：TP303[自动化与计算机技术—计算机系统结构]