基于有色Petri网的FIFO栈建模与优化  

Colored Petri-net based approach for modeling and optimization of FIFO stack

作　　者：付新华[1] 肖明清[1] 袁大勇[1] 邹德鹏[1] 

机构地区：[1]空军工程大学工程学院自动测试系统实验室,西安710038

出　　处：《仪器仪表学报》2008年第3期577-582,共6页Chinese Journal of Scientific Instrument

摘　　要：先入先出FIFO栈在智能仪器及测试系统中起着重要作用。针对FIFO栈设计缺乏理论指导和严格数学验证的问题,提出采用有色Petri网(CP-net)来建模和优化FIFO栈。提出了一种FIFO栈设计模型,FIFO栈的入栈口和出栈口固定但容量可变。应用建模、仿真工具CPN Tools对FIFO栈的动态运行过程进行建模、仿真和分析,并在此基础上,对FIFO栈模型进行了优化。采用Verilog HDL在现场可编程逻辑门阵列FPGA上具体实现了FIFO栈的硬件电路。仿真结果和实际应用表明,该设计模型是活的、公平的、安全的和高效的。FIFO（first in first out）stack plays an important role in intelligent instrument and test system. Aiming at lacks of theoretical guidance and strict mathematical verification during the process of designing FIFO stack, an approach of modeling and optimization of FIFO stack is proposed using Colored Petri net （CP-net）. A design model of FIFO stack that has fixed entrance and export but alterable capacity is given and CPN Tools, a tool for editing, simulating and analyzing CP-net, is adopted to model, simulate and analyze the dynamic working process of FIFO stack. And the FIFO stack model is also optimized. The hardware circuit of FIFO stack was implemented on FPGA （ Field Programmable Gate Array） by using Verilog HDL. Simulation results and practical application show that the model is live, fair, safe and efficient.

关 键 词：FIFO栈 有色PETRI网 建模 优化 CPN TOOLS 硬件实现 

分 类 号：TP311[自动化与计算机技术—计算机软件与理论]