兼容X86指令的32位乘法器的分析与设计  

Analysis and design of X86 instruction compatible 32bit multiplier

作　　者：王得利[1] 高德远[1] 杨磊[1] 

机构地区：[1]西北工业大学航空微电子中心,西安710072

出　　处：《计算机应用研究》2008年第4期1264-1267,共4页Application Research of Computers

基　　金：国家自然科学基金资助项目(60573107;60573143)

摘　　要：通过研究X86指令手册中各种乘法指令,分析其可能需要的微指令类型,结合龙腾C2的微体系结构,对执行部件以及译码部件工作作出权衡,同时又考虑到旁路设计的需求,设计出适应不同乘法指令类型及结果时机需求的三级流水32位有符号、无符号混合树型乘法器结构。使用基4布斯编码,对操作数的高位进行分析,将传统的17个部分积转变为16个部分积,减少了乘法部件的面积,同时在逻辑上给出了关断开关,尽量减少电路的翻转频率,有效地降低了电路的功耗。Based on the study of various forms of muhiply instruction on Intel X86 instruction set reference, proposed the potential types of micro instruction in need. Combine with the micro architecture of Longtium C2, made a compromise between the execution unit and the decoder unit, and took bypass logic into consideration, this paper demonstrated a 3- pipeline sign and no sign unified tree form multiplier, which met the requirements of different types of multiply instruction and different results valid occasions. By means of radix- 4 Booth＇ s method, with the analysis of the high bits of sign operands, the conventional 17 partial products wele reduced to 16, resulting of compact structure. In order to cut down the power of the multiplLier consumed, some logic switches were employed to decrease the frequency of the circuits transition.

关 键 词：X86指令 微指令 乘法器 旁路逻辑 低功耗 

分 类 号：TP311[自动化与计算机技术—计算机软件与理论]