JPEG2000中优化逼近的整型小波变换  

Optimized-approximate integer-to-integer wavelet transform and its VLSI architecture of JPEG2000 codec

作　　者：郭杰[1] 吴成柯[1] 王柯俨[1] 马静[1] 张磊[1] 

机构地区：[1]西安电子科技大学综合业务网理论及关键技术国家重点实验室,陕西西安710071

出　　处：《西安电子科技大学学报》2008年第2期210-215,共6页Journal of Xidian University

基　　金：国家自然科学基金资助(60532060;60507012)

摘　　要：提出了一种JPEG2000中整型小波变换的优化逼近方案,并从硬件实现的角度出发,提出相应的基于行提升算法的VLSI结构.该方案在提升步骤中有效保护小波系数的尾数部分,从而确保在小波系数动态范围限定的情况下进一步提高小波变换的精度,从而提高图像压缩的质量.由于在硬件实现中采用基于行的提升变换结构,使水平和垂直方向上的变换能并行处理.实验表明,在XC2V3000型号的Xilinx FPGA上实现该结构所需资源只占27%,时钟频率可达到66MHz以上.与其他小波变换结构相比,该结构不仅改善了小波变换的性能,同时具有并行度高、节省存储空间等优点,并且可以在一幅图像逐行扫描的时间T内完成整幅图像的小波变换.A new optimized-approximate integer-to-integer wavelet transform of the JEPG2000 scheme is proposed. And from the hardware perspective, the corresponding line-based VLSI based on the lifting scheme is put forward. Considering that the dynamic range of the wavelet coefficients is limited, this scheme ensures higher precision of the wavelet transform and accordingly improves the quality of image compression by preserving efficiently fractions of wavelet coefficients in lifting steps. Thanks to the line- based architecture in hardware implementation, the horizontal transform and vertical transform can be executed in a parallel way. Experiments show that on a Xilinx FPGA marked XC2V3000, the architecture requires only 27% resources and achieves a higher clock frequency up to 66MHz. Compared with other existing wavelet transform architectures, the proposed architecture not only advances performance of the integer-to-integer wavelet transform, with advantages of high parallelism and reduction in storage, but also guarantees total levels of the wavelet transform during the time T that an image is scanned line by line.

关 键 词：小波变换 提升算法 优化逼近 超大规模集成电路 

分 类 号：TN911.81[电子电信—通信与信息系统]