利用锁频环路的快速跳频合成信号发生器  

Fast hopping frequency systhesizer utilizing a frequency locked loop

作　　者：朱健[1] 

机构地区：[1]中国电子科技集团公司第41研究所,蚌埠233006

出　　处：《电子质量》2008年第4期19-21,共3页Electronics Quality

摘　　要：介绍一种高性能快速跳频合成信号发生器,利用锁相环路和锁频环路相结合的原理和跳频校准控制技术而实现的。着重介绍了延迟线鉴频器锁频环路的工作原理、低噪声特性和宽带特性,仪器实现低相噪和快速频率转换的机理。介绍了通过信道、序列设置,每个频率点的环路增益参数和预调电压的校准和存储,实现快速跳频的方法。A high performance fast hopping frequency systhesizer has been introduced in this article. It was realized by utilizing a combined phase locked and fraquency locked loop and the calibration ＆ control technology of frequency hop. The principle of fTequency lock loop including delay line discriminator and it＇s characteristic of the low noise and broad band has been introduced in detail in this article. The method of fTequency fast hop was realized by setting channel table and sequence table, and by calibrating ＆ storing the loop gain parameters and the pretuned voltages of each frequencies.

关 键 词：频率合成 延迟线鉴频器 锁频环路 快速跳频 跳频校准 跳频序列 

分 类 号：TN914.41[电子电信—通信与信息系统]