低频数字式相位测量仪的设计  

Design of Low-frequency Digital Phase Measuring Apparatus

作　　者：田秀丰[1] 何继爱[1] 李敏[1] 

机构地区：[1]兰州理工大学计算机与通信学院,兰州730050

出　　处：《无线通信技术》2008年第2期55-58,61,共5页Wireless Communication Technology

基　　金：兰州理工大学学生科技创新基金资助(项目代号:2007016)

摘　　要：基于过零检测法原理,以单片机87c51和可编程逻辑器件CPLD为核心,从数据采集电路、数据运算控制电路和显示电路等功能电路出发,实现了一个低频数字式相位测量仪系统,并进行了仿真验证。数据采集单元完全在一片CPLD芯片内部实现,真正实现了系统设计的简化。系统可以对20Hz^20kHz频率范围内的信号进行精确测量;与传统相位测量仪相比,具有硬件电路简单,测量速度快,易于实现等优点。This design uses the principle of zero -crossing, takes the 87C51 and CPLD as the core, based on data acquisition circuit, data operational control circuit and display circuit, achieves a low -frequency digital phase measuring apparatus, and gets the waveform simulation. The acquisition circuit is achieved independently in one CPLD chip, predigests the whole project. The system can measure the signal with 20 Hz - 20kHz frequency ; compared with the traditional phase meter, it has the advantages of simple hardware circuit, rapid speed and easy to realize.

关 键 词：相位差 过零检测法 CPLD 单片机 

分 类 号：TN06[电子电信—物理电子学]