检索规则说明:AND代表“并且”;OR代表“或者”;NOT代表“不包含”;(注意必须大写,运算符两边需空一格)
检 索 范 例 :范例一: (K=图书馆学 OR K=情报学) AND A=范并思 范例二:J=计算机应用与软件 AND (U=C++ OR U=Basic) NOT M=Visual
作 者:甘国友[1] 王立惠[1] 孙加林[1] 肖胜根[1] 严继康[1]
机构地区:[1]昆明理工大学材料与冶金工程学院,云南昆明650093
出 处:《压电与声光》2008年第3期285-287,共3页Piezoelectrics & Acoustooptics
基 金:云南省科技攻关基金资助项目(2002GG09);昆明理工大学科研基金资助项目(2007-15)
摘 要:采用材料梯度化设计思路,将传统电子陶瓷工艺的单层装料一次干压成型工序改进为逐层装料一次干压成型工序。沿着实现ZnO压敏陶瓷低压化的主要途径:减小ZnO压敏电阻器瓷片的厚度和增大ZnO平均晶粒尺寸,在烧结温度1 100℃下,制备出电学性能理想的梯度ZnO低压压敏陶瓷。该陶瓷的压敏电压为8 V/mm,非线性系数为19,漏电流为13μA;其克服了瓷片机械强度劣化及能量耐受能力下降的缺陷。该制备工艺简单,为ZnO压敏电阻器的低压化提供了新方案。In this paper, the idea of functional gradient materials design is adopted originally in the field of prep- aration of ZnO low-voltage varistor ceramic. The traditional electronic ceramic process of single-layer loading material particles & one-time dry-press molding was substiuted by the one of multilayer loading material particles & onetime dry-press molding. On the basis of the main principles of ZnO low-voltage varistor ceramic, which are dimin- ishing the thickness of the ceramic disc and augmenting the average size of ZnO grains, gradient ZnO low-voltage va- ristor ceramic with good electrical properties has been prepared at the sintering temperature of 1 100 ℃. That varistor ceramic have breakdown voltage of 8 V/mm, nonlinear coefficient of 19 and leakage current of 13μA , with good mechanical strength and energy endurance. The preparation process is simple and provides a new scheme for preparing ZnO low-voltage varistor ceramic.
分 类 号:TN605[电子电信—电路与系统]
正在载入数据...
正在载入数据...
正在载入数据...
正在载入数据...
正在载入数据...
正在载入数据...
正在载入数据...
正在链接到云南高校图书馆文献保障联盟下载...
云南高校图书馆联盟文献共享服务平台 版权所有©
您的IP:216.73.216.198