基于FPGA的视频信息采集系统设计  

Design of a system of video information collecting based on FPGA

作　　者：徐遵磊[1] 贾建援[1] 张大兴[1] 

机构地区：[1]西安电子科技大学机电工程学院,陕西西安710071

出　　处：《微计算机信息》2008年第14期179-181,共3页Control & Automation

基　　金：国家自然科学基金(10476019)

摘　　要：文章介绍了一种基于FPGA的防信息泄漏视频信息采集系统。用可编程逻辑器件FPGA控制两片SDRAM交替读写,实现视频信号的无缝缓冲传输;在FPGA读取视频信息后,先用位面分层技术把串行视频信息转换为并行数据再送到视频电缆上。通过仿真和实验验证,该系统既满足视频系统对实时性的要求,又能有效降低视频信息在传输电缆上的信息泄漏。This article introduces a video information collecting system for anti_video leakage,which is based on FPGA. Alternating reading and writing of the two SDRAM that generates the jointless transmission buffer is controlled by programmable logical device FPGA.After video information read by FPGA, serial video information is transformed into parallel format by Bit-Plane Separation technology first,and then sent to video cable.The result of simulation and experiment show that the system is not only fulfilling the real-time request completely,but also reducing the information leakage effectively.

关 键 词：FPGA 信息泄漏 并行传输 

分 类 号：TM154[电气工程—电工理论与新技术]