Parallel Bootload System via DSP  

作　　者：YAN Jie-min XU Ru WANG Deqing 

机构地区：[1]Communication engineering Department of Xiamen University, Xiamen 361005,China

出　　处：《微计算机信息》2008年第16期75-77,共3页Control & Automation

基　　金：Project of the National NaturalScience Foundation of China( 60572106)

摘　　要：The consideration of bootload is absolutely necessarily in the design of DSP systems. By designing a minimum system us-ing TMS320VC5502 and flash memory, this article designs an integrated scheme of its parallel bootload method. In addition, the ISP (In System Programming) technology for flash memory and the method of creating a boot table is discussed. Finally, application codes are successfully loaded from outer flash into internal RAM on the system, and the off-line execution is implemented.The consideration of bootload is absolutely necessarily in the design of DSP systems. By designing a minimum system using TMS320VC5502 and flash memory, this article designs an integrated scheme of its parallel bootload method. In addition, the ISP （In System Programming） technology for flash memory and the method of creating a boot table is discussed. Finally, application codes are successfully loaded from outer flash into internal RAM on the system, and the off-line execution is implemented.

关 键 词：平行引导装入系统 数字信号处理 极小值 闪速存储器 

分 类 号：TN911.72[电子电信—通信与信息系统] O174.1[电子电信—信息与通信工程]