高速低功耗CMOS电荷泵的设计  

Design of High Speed and Low Power CMOS Charge Pump

作　　者：孔青荣[1] 胡赛纯[2] 殷蔚[3] 张红南[1] 黄雅攸[1] 

机构地区：[1]湖南大学物理与微电子科学学院 [2]湖南城市学院,湖南益阳413000 [3]湖南岳阳职业技术学院,湖南岳阳414000

出　　处：《现代电子技术》2008年第10期7-8,12,共3页Modern Electronics Technique

基　　金：湖南省自然科学基金资助项目(07JJ5079)

摘　　要：提出一种适用于锁相环路的高速、低功耗电荷泵电路的设计。针对传统电荷泵电路的电流失配问题,本设计引入增益增强电路取代了传统电路中引用共源共栅来增加输出阻抗,大大提高了电路的性能。采用0.35μmCMOS工艺实现,在HSpice的平台下进行仿真。仿真结果表明,该电路充放电时间为40 ns,整体平均功耗为0.3 mW,实现了高速低功耗的目的。In this paper,high speed and low power CMOS charge pump is designed which is suit for the phase-lock ring circuit. In view of the mismatch question of the traditional charge pump,the gain enhancement electric circuit is used in place of the cascade structure in the traditional charge pump, which greatly enhances the electric circuit performance. All the design is competed under the 0.35 μm CMOS process and the simulated under the HSpice platform. The simulation result indicate that; this electric circuit sufficient-discharge time is 40 ns,the whole average power loss is 0. 3 mW. So the high speed and low power goal is realized.

关 键 词：电荷泵 CMOS 高速低功耗 电流失配 

分 类 号：TN911.8[电子电信—通信与信息系统]