基于FPGA的同步并联LFSR序列生成器设计  

Design of Sequence Generator with Synchronous Parallel LFSR Based on FPGA

作　　者：王星[1] 沈小林[1] 

机构地区：[1]中北大学通信与信息工程学院,山西太原030051

出　　处：《现代电子技术》2008年第10期125-128,共4页Modern Electronics Technique

基　　金：国家自然科学基金资助项目(60602041);山西省自然科学基金资助项目(2006021018)

摘　　要：针对直接由线性反馈移位寄存器(LFSR)产生的序列的线性复杂度太小,难以经受线性逼近攻击的问题。在研究序列密码设计理论和LFSR的并联理论的基础上,提出一种基于FPGA(Field Programmable Gate Array,现场可编程门阵列)的利用3个LFSR同步并联构成一个序列生成器的方法。利用VHDL(VHSIC Hardware Description Language)语言编写其实现程序,并应用FPGA设计工具Xilinx ISE7.1i,调用ModelSim SE6.1c对其进行仿真。仿真结果和密码强度评估理论分析表明这种序列生成器产生的序列密码具有很高的强度和抗破译能力。The sequence generated by single Linear Feedback Shift Register（LFSR）directly can not resist the linear approximation attack, since it has low linear complexity. The thesis presents a method of constituting a sequence generator with three synchronous parallel LFSRs based on a Field Programmable Gate Array（FPGA） on the foundation of study of the theory of sequence design and parallel LFSR,and provides the implementation program with VHSIC Hardware Description Language （VHDL）, finally uses the designing instrument of FPGA Xilinx ISET. l i,and calls ModelSim SE6. 1 c to simulate it. The result of simulation and the assessment of intensity indicate that the consequence generated by the generator specially designed possess high intensity and the ability of resisting deciphering.

关 键 词：序列生成器 线性反馈移位寄存器 LFSR同步并联 FPGA 

分 类 号：TP368.1[自动化与计算机技术—计算机系统结构]