同步数字体系网元时延分析与仿真  

Delay Analysis and Emulation on SDH Network Elements

作　　者：张继荣[1] 方强[2] 徐东明 

机构地区：[1]中国科学院国家授时中心,西安710600 [2]西安邮电学院通信工程系,西安710061 [3]西安深亚公司,西安710061

出　　处：《光子学报》2008年第5期875-878,共4页Acta Photonica Sinica

基　　金：陕西省自然科学基金(2002F25)资助

摘　　要：利用同步数字体系(Synchronous Digital Hierarchy,SDH)网络组建全国的时间同步网,需要研究传递路径的时延和时延误差·本文对SDH网络时延进行了测量,对SDH网元的时延特性进行了仿真·仿真结果表明,单个SDH网元处理SOH通道信号的时延为几十μs,时延偏差在1ns左右,该准确度可以满足绝大多数行业对时间同步信号的要求·Delay of the transmission path and its uncertainty should be discussed in constructing the time synchronous network in the national area with the SDH network. The delay of SDH network is measured, and the delay feature of the SDH element is simulated. The simulation results show that the processing delay of a SDH element is about tenth a few microseconds and the error is about one nanosecond. The accuracy can meet the requirement on the time synchronization in most fields.

关 键 词：时间同步 同步数字体系网元 时延测量 时延仿真 

分 类 号：TN929.11[电子电信—通信与信息系统]