基于FPGA的智力竞赛抢答器实验设计与实现  

Experimental Design and Realization of the Intellectual Contest Responder Based on FPGA

作　　者：杜新虎[1] 韩芝侠[2] 

机构地区：[1]西北工业大学自动化学院,陕西西安710072 [2]宝鸡文理学院电子电气工程系,陕西宝鸡721007

出　　处：《实验室研究与探索》2008年第3期36-39,共4页Research and Exploration In Laboratory

摘　　要：针对大学生电子技术综合实验的要求,在介绍Max+plusⅡ的EDA软件平台的基础上,基于FPGA设计了一款实验用智力竞赛抢答器,给出了各模块及具体电路图。通过编辑、编译和器件编程,将编程器文件以在线配置方式下载到ISP实验板的EPF10K10LC84-4器件中,经实际电路测试验证,达到了预期的设计要求。该电路不但能实现互锁和自锁,并且能用声音、数字准确提示抢答的优先结果。According to the request of the electronic technology synthesis experiment, this paper introduced an EDA software platform of Max ＋ plusⅡ. It designed an intellectual contest device of experiment to answer the question preemptively based on FPGA, and presented each module and idiographic circuit diagram. By editing, compiling and device programming, files of device programming in circuit configurable are down loaded to the device of EPF10K10 LC84-4 of ISP experimental plate. It achieved the expectant requirements of design after actual circuit testing and verifying. This circuit can not only realize to lock with each other and itself, but also use the voice, arithmetic figure to hint the result at the same time.

关 键 词：FPGA 在系统 Max+plusⅡ FLEX10K 抢答器 仿真 

分 类 号：TP331.2[自动化与计算机技术—计算机系统结构]