基于CPLD的CCD视频信号处理电路的设计与硬件实现  

Designed on Video Circuit for CCD Cameras and Hardware Based on CPLD

作　　者：陈学飞[1] 汶德胜[1] 郑培云[1] 马涛[1] 梁义涛[1] 

机构地区：[1]中国科学院西安光学精密机械研究所

出　　处：《电子器件》2008年第3期807-810,共4页Chinese Journal of Electron Devices

摘　　要：在分析VSP1012型CCD视频信号处理芯片工作原理的基础上,设计了CCD成像系统的视频信号处理电路及其硬件电路。选用CPLD器件作为硬件设计载体,使用VHDL语言对VSP1012的初始化设置和驱动时序发生器进行了硬件描述。并针对ALTERA公司的EPM7160SLC84-10进行了RTL级仿真及配置。硬件实验结果表明,所研制的CCD视频信号处理电路不仅可以满足CCD成像系统视频信号处理的要求,而且集成度高,应用方便。Based on the working principle of VSP1012 video signal processing interface for CCD imaging system, video signal processing circuit and its hardware have been designed for CCD imaging system. Complex programmable logic devices （CPLD are applied for hardware designing platform. Initializing set and driving schedule generator are described with VHDL. The RTL simulation is fulfilled and designed, which is fitted into EPMT160SLC84-10. Hardware experiments show that the CCD video signal processing circuit is not only to meet the requirements of CCD imaging system, but also high integration and convenient.

关 键 词：CCD成像系统 视频信号处理 复杂可编程逻辑器件(CPLD) 驱动时序发生器 

分 类 号：TN386.5[电子电信—物理电子学]