三相晶闸管数字移相触发的实现  

The Method for the Digital Phase-Shifted Trigger in Three-Phase Thyristor

作　　者：杨新华[1] 陈玉松[1] 金兴文[1] 

机构地区：[1]兰州理工大学电气工程与信息工程学院,甘肃兰州730050

出　　处：《甘肃科学学报》2008年第2期135-138,共4页Journal of Gansu Sciences

基　　金：甘肃省自然科学基金(3ZS04-B25-012)

摘　　要：针对常用晶闸管触发电路的缺点,设计了基于CPLD的三相晶闸管数字移相触发电路.触发电路以CPLD为核心,可以集成到一个逻辑芯片上,克服了传统设计方法的不足,输出的触发脉冲具有对称度好、响应快、精度高、抗干扰能力强、稳定性好的特点.Aiming at the defects of the traditional circuit the method for the digital phase-shifted trigger in three-phase circuit is proposed on the basis of CPLD. The circuit works around the programmable logic device, and it is designed on one chip so that it is stable with strong anti-jamming capability and produces highly symmetrical, quickly responsive and highly accurate trigger pulses, avoiding the defects of the traditional circuit.

关 键 词：晶闸管 数字移相触发 CPLD 触发脉冲 

分 类 号：TM921.51[电气工程—电力电子与电力传动]