AVS帧间预测亮度插值模块的VLSI实现  

VLSI Implementation of Interframe Prediction Luminance Interpolation Module Based on AVS

作　　者：王亚东[1] 陈咏恩[1] 

机构地区：[1]同济大学通信软件及专用集成电路设计中心,上海200092

出　　处：《自动化信息》2008年第6期37-38,41,共3页Automation Information

摘　　要：为了推动音视频编码标准（AVS）解码芯片产业的发展，提出了一种基于AVS标准的帧间预测亮度插值电路的硬件结构。该设计方案将像素点按位置的不同分为三层，并采用了不同的流水线结构予以实现，充分利用了像素点之间的复用情况，兼顾处理速度和实现代价两方面考虑。该方案硬件实现效率较高，满足了硬件资源以及系统时钟频率的要求。To promote the development of the audio video coding standard （AVS） chip industry, an intefframe prediction luminance interpolation circuit architecture based on AVS is proposed in this paper. The pixel points are divided into three layers according to their different positions and the luminance interpolation of each pixel is implemented by different pipeiine architectures. The design scheme takes full advantage of the reusable pixel points with the both consideration of proper processing speed and production cost. With high hardware implementation efficiency the hardware resource and the clock frequency of the system can be satisfied.

关 键 词：AVS 帧间预测 亮度插值 VLSI架构 

分 类 号：TN919.8[电子电信—通信与信息系统]