基于电流信息的CMOS SRAM存储单元故障测试  

Testing fault in CMOS SRAM circuit based on current signal

作　　者：陈飞[1] 王友仁[1] 崔江[1] 

机构地区：[1]南京航空航天大学自动化学院,江苏南京210016

出　　处：《传感器与微系统》2008年第6期100-103,共4页Transducer and Microsystem Technologies

基　　金：国家自然科学基金资助项目(60374008;60501022);航空科学基金资助项目(2006ZD52044;04I52068)

摘　　要：针对深亚微米技术,提出了差分静态电流技术和动态电流技术相结合的方法对CMOS SRAM存储单元进行故障诊断,针对该方法改进了0-1算法。改进的0-1算法与传统的March算法相比,明显降低了测试开销。以四单元存储器为诊断实例,针对桥接故障、开路故障与耦合故障,实现了100%故障诊断覆盖率。实验结果证明了新方法具有故障覆盖率高的特点,能够诊断传统逻辑测试法难以探测的部分故障。Aiming at the technology of very deep sub-micron （VDSM）, the method which combines deha-IDDQ and IDDT to test CMOS SRAM is proposed, and the 0-1 arithmetic for the method is improved. The improved 0-1 arithmetic compared to traditional March arithmetic obviously reduces spending of testing. A sample diagnosis of memory circuit which has four cells reaches 100 % fault coverage while tests bridge fault, open fault and coupling fault. The test results certify that the new method has high fault coverage, and can diagnose some fault which traditional logic testing difficultly diagnose.

关 键 词：数字电路测试 电源电流检测 存储器故障 故障诊断 

分 类 号：TP206.3[自动化与计算机技术—检测技术与自动化装置]