高效率、低功耗直流电压转换器芯片的设计与实现  

Design and IC Implementation of High Efficiency and Low Power DC-DC Converter

作　　者：王菁[1] 梁斌[1] 胡清琮[1] 陈东坡[1] 何乐年[1] 

机构地区：[1]浙江大学超大规模集成电路设计研究所,浙江杭州310027

出　　处：《江南大学学报（自然科学版）》2008年第3期281-286,共6页Joural of Jiangnan University (Natural Science Edition)　

基　　金：浙江省重点科技计划项目(2007C21021)

摘　　要：提出了一种基于脉冲宽度调制（PWM）和脉冲频率调制（PFM）模式的高效率、低功耗直流电压转换器的设计方法.电路在负载电流大于60 mA时采用开关频率1 MHz的PWM工作模式,在负载电流小于60 mA时采用开关频率降低的PFM工作模式,实现了在0～250 mA负载电流变化范围内的高转换效率.当输出电压达到预计输出电压的102%时,电路自动进入待机状态,使得静态工作电流降低.芯片采用CSMC公司的0.5μm CMOS混合信号模型设计和流片.测试结果表明：该电路可实现PWM和PFM模式供电以及两种模式之间的平稳过渡,具有较好的负载和线路电压调整,其输出电压的误差小于±2%,最大静态工作电流小于15μA,最大转换效率达92.6%.A design method of a high-efficiency, low-power DC-DC converter with pulse-width modulation （PWM） and pulse-frequency modulation （PFM） modes is presented in the paper. The converter operates in PWM mode at a switching frequency of 1 MHz when the load current is larger than 60 mA, and works in PFM mode with a reduced switching frequency if the load current is less than 60 mA, ensuring highly efficient operation within a large range （0 -250 mA） of load current variation. As the output voltage reaches 102 % of the anticipated output value, the converter enters sleep mode, during which the quiescent current decreases. The chip was implemented using CSMC 0.5 μm CMOS mixedsignal process. The experimental results indicate that the converter operates in PWM/PFM modes and performs seamless switching between them, displaying good load/line regulation. The output voltage error is less than ± 2 %, the maximum quiescent current less than 15 μA and the maximum of efficiency up to 92.6%.

关 键 词：直流电压转换器 脉冲宽度调制 脉冲频率调制 高效率 低功耗 

分 类 号：TN432[电子电信—微电子学与固体电子学]