一种双控制回路低相位噪声CMOS压控振荡器设计  

Design of a dual loop controled and low phase noise CMOS voltage controlled oscillator

作　　者：陈强[1] 王楠[2] 

机构地区：[1]重庆三峡学院应用技术学院,重庆万州404000 [2]电子科技大学电子工程学院,成都610054

出　　处：《中国集成电路》2008年第7期42-45,共4页China lntegrated Circuit

摘　　要：在集成锁相环中,压控振荡器的输出频率范围要能随所有工艺和工作条件的变化而覆盖所需的频率范围。增大压控振荡器的增益而实现宽调协范围会增加压控振荡器和锁相环的相位噪声[1]。在这篇文章中,通过两路控制来得到压控振荡器中心频率可调,实现了非常小的压控振荡器增益。In full integrated PLLs, the Vco output frequency should be tunable over a wide range of frequencies, for all the process variation and work conditions. A wide tuning range realized by making the Vco gain Kvco large has the unwanted effect of increasing the phase noise at the output of Vco, and hence of the PLL as well. In this work, by using the two control loops to make the center frequency of the Vco changeable,This allow the Kvco is very small.

关 键 词：相位噪声 中心频率 频率范围 增益 

分 类 号：TN752[电子电信—电路与系统] TN752.5