基于AD9516的高速四通道时间交叉采样时钟的设计  

Design of high-speed four-channel time-interleaved sampling clock based on AD9516

作　　者：王和国[1] 张玉静[1] 刘书明[1] 

机构地区：[1]西安电子科技大学电子工程学院,陕西西安710071

出　　处：《国外电子元器件》2008年第6期7-9,12,共4页International Electronic Elements

摘　　要：针对四通道时间交叉采样对时钟的严格要求,提出了使用时钟分配器AD9516给四个交叉采样的模数转换器AD9445提供四路在相位上严格相差90°的110 MHz的采样时钟。在介绍AD9516特性的基础上,详细说明了系统设计电路结构,并利用FPGA模拟高速同步串行口(SPI)协议,实现了DSP利用FPGA当作桥接器件和AD9516通信。As to the strict requirement of four channel time-interleaved sampling for clock,a new method that uses clock buffer AD9516 to provide four sampling clocks of 110MHz which differ by 90°in phase for four time-interleaved analog-to-digital converter is introduced in this paper.The characteristics of AD9516 and the circuit diagram are presented in detail. Making use of FPGA to simulate SPI protocol, the communication between AD9516 and DSP is realized by using the FPGA as bridge chip.

关 键 词：时间交叉采样 AD9516 FPGA SPI协议 

分 类 号：TN713[电子电信—电路与系统] TP333.2[自动化与计算机技术—计算机系统结构]