基于TMS320C80的扩维并行DFT算法实现研究  

The Achievement Study of Expanded-Dimension Parallel DFT Algorithms Based on TMS320C80

作　　者：胡辉[1] 

机构地区：[1]华东交通大学信息工程学院,江西南昌330013

出　　处：《微电子学与计算机》2008年第8期5-7,12,共4页Microelectronics & Computer

摘　　要：提出某些正交变换算法具有扩维并行性,并由此归纳出扩维并行DFT算法.该算法将N点的一维DFT分解成N0×N1点的二维DFT(其中N=N0×N1)和一些运算量很小的附加运算的并行扩维DFT算法,并在多处理机平台-TMS320C80上进行了该算法实现方法的研究.此算法有效地减少了数据的相关性,降低了编程的复杂性,突破了处理单元片内内存容量的限制,适合在一类以DSP为处理单元的多处理机平台上并行实现.在TMS320C80进行的试验表明:所开发的并行DWT算法运行结果与理论分析是吻合的,该并行算法的速度和精度都得到了保证,并适合在单DSP上实现.In this paper,based on expanded-dimension parallelism of some orthogonal transform algorithms,a parallel DFT algorithm is concluded. On the parallelism, one dimension DFT of length N = N0×N1 can be decomposed into two dimension DFT of length N0×N1 with some little additional operations. The study on achievement of the parallel DFT algorithm based on multiprocessor platform-TMS320CS0 is carried out. The algorithm reduces programming complexity, data relativity and limitation of processor unit＇s on-chip memory capacity and suits achievement on multiprocessor platform on which DSP acts as processor unit. TMS320C80 experiment indicates the developed parallel DWT algorithm results abide by theoretical analysis, that is, the algorithms speed and precision are guaranteed, the method makes it easy to realize on a single DSP.

关 键 词：DFT 并行算法 紧耦合多处理机 TMS320C80 

分 类 号：TP301.6[自动化与计算机技术—计算机系统结构]