一种基于衬底驱动的亚1V轨至轨运放设计  

A Sub-1 V Rail-to-Rail CMOS OPA Based on Bulk-Driven Technique

作　　者：朱冬勇[1] 杨银堂[1] 朱樟明[1] 陈杉[1] 

机构地区：[1]西安电子科技大学微电子研究所,宽禁带半导体材料与器件教育部重点实验室,西安710071

出　　处：《电子器件》2008年第4期1147-1149,1154,共4页Chinese Journal of Electron Devices

基　　金：国家自然科学基金资助项目(60476046);教育部博士点基金资助项目(20050701015)

摘　　要：基于衬底驱动技术,本文设计了一种亚1V Rail-to-Rail运算放大器。在差分对衬底端加信号避开低压环境MOS管阈值电压限制,运用局部正反馈技术来增加增益和带宽。在0.8V电源电压,18pf的电容负载下用Hspice仿真,结果表明:直流增益达74.1dB,相位裕度为62o,单位增益带宽为4.56MHz,输出范围达2.72～782.17mV,失调电压仅为12μV,功耗为144.2μW。Based on bulk-driven technique, this paper presents a sub-1 V rail-to-rail CMOS operational amplifier. To avoid the constraint of threshold voltage of MOSFET, signals are applied to the hulk terminals of the differential pairs; a partial positive feedback is used in this OPA to increase the gain and gain-bandwidth. With the supply voltage of 0. 8 Voltage, the simulation results from HSPICE indicate that the OPA has a DC gain of 74. 1 dB, phase margin of 62 degree , unity-bandwidth of 4. 56 MHz and a wide range of output swing when 18 pF load is connected to the amplifier output. The offset voltage is only 12μV with 144. 2μW power dissipation.

关 键 词：衬底驱动 亚1V RAIL-TO-RAIL CMOS 运算放大器 

分 类 号：TN402[电子电信—微电子学与固体电子学]