基于FPGA的高速数据采集系统设计及与TMS320C6416接口实现  

Design of High-speed Data-collecting System Based on FPGA and Interface with TMS320C6416

作　　者：卜英勇[1] 鲁志佩[1] 贺茂坤[1] 张超[1] 

机构地区：[1]中南大学机电工程学院,湖南长沙410083

出　　处：《仪表技术与传感器》2008年第7期95-98,共4页Instrument Technique and Sensor

基　　金：国家自然科学基金项目(50474052)

摘　　要：相对于运算速度越来越快的DSP芯片,与之匹配的高速数据采集系统也变得更加重要。介绍了一种基于FP-GA的双通道、最高采样率为10 MSPS的高速数据采集系统设计。对如何用FPGA实现该数据采集系统的数据缓存和数据传输的逻辑控制,以及FPGA与AD9240的接口设计等给出了详细说明。最后,还介绍了该数据采集系统与TMS320C6416的接口设计。Relative to quicker and quicker calculating rate of DSP, the high-speed data-collecting systems turn more and more important. A design of a dual-channels high-speed data-collecting system based on FPGA was introduced. The method to implement data buffer and logical control of the data transfer through FPGA was introduced, and the design of the interface between FPGA and AD9240 was also shown up. Finally, this paper introduced how to implement the interface between TMS320C6416 and the data-collecting system.

关 键 词：数据采集系统 FPGA TMS320C6416 AD9240 

分 类 号：TP335[自动化与计算机技术—计算机系统结构]