一种新的高清数字电影播放系统的高速缓存和音视频同步设计  

Design of high speed buffer and video-audio synchronization for a novel high resolution digital cinema system

作　　者：王国晖[1,2] 朱振华[1,2] 张科[1,2] 魏铮[1,2] 王贞松[1] 

机构地区：[1]中国科学院计算技术研究所,北京100080 [2]中国科学院研究生院,北京100039

出　　处：《高技术通讯》2008年第8期771-777,共7页Chinese High Technology Letters

基　　金：863计划(2006AA701119)资助项目

摘　　要：基于 FPGA 和专用解码芯片结构,实现了一种符合 DCI 规范的2K 高清数字电影播放系统。针对高清数字电影码流数据量大、传输速率高的特点,设计了一种采用乒乓结构和基于目录表的动态内存管理策略的高性能缓存系统,以及一种基于高速缓存和帧查找表的音视频同步方法,整套系统简单高效,便于 VLSI 硬件实现。实验结果表明,此系统可以流畅播放350Mbps 码率的数字电影,并且连续播放3个小时,音视频失同步可控制在20ms 之内,满足数字电影规范的要求。Based on the structure of field-programmable gate array （FPGA） and application-specific decoding chip, a novel 2K-high resolution digital cinema system was implemented according to the Digital Cinema Initiatives （DCI）＇ Digital Cinema System Specification （Ver. 1.0）. In order to process the high bit rate video stream in real time, a high speed buffer system was designed using ping-pong structure and a dynamic buffer management method. Mso, in view of the DCI specification, strict requirement on quality of service when playing a movie, and the more significance of the synchronization between the video track and the audio track, taking the characteristic of digital cinema into account, a new approach designed for the synchronization was proposed based on the high speed buffer and the frame look-up table. This approach can be easily implemented in FPGA. The system supports the JPEG2000 digital cinema content with the bit rate being up to 350Mbps.

关 键 词：DCI-2K 高痛数字电影 高速缓存 音视频同步 FPGA 

分 类 号：TN946[电子电信—信号与信息处理]