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机构地区:[1]浙江大学超大规模集成电路设计研究所,杭州310027
出 处:《Journal of Semiconductors》2008年第8期1529-1534,共6页半导体学报(英文版)
基 金:国家自然科学基金(批准号:90707002);浙江省自然科学基金(批准号:Z104441)资助项目~~
摘 要:An on-chip voltage reference with a wide supply voltage range is required by some applications,especially that of power management (PM) controller chips applied to telecommunication, automotive, lighting equipment, etc., when high power supply voltage is needed. Accordingly,a new bandgap reference with a wide supply voltage range is proposed. Due to the improved structure,it features a high power supply rejection ratio (PSRR) and high temperature stability. In addition, an auxiliary micro-power reference is introduced to support the sleep mode of the PM chip and reduce its standby power consumption. The auxiliary reference provides bias currents in normal mode and a 1.28V reference voltage in sleep mode to replace the main reference and save power. Simulation results show that the reference provides a reference volt- age of 1.27V,which has a 3.5mV drift over the temperature range from -20 to 120~C and 56t^V deviation over a supply voltage range from 3 to 40V. The PSRR is higher than 100dB for frequency below 10kHz. The circuit was completed in 1.5tzm BCD (Bipolar-CMOS-DMOS) technology. The experimental results show that all main expectations are achieved.提出一种可在宽电源电压范围下工作的带隙基准源设计.由于采用了一些新的结构,使得其电源抑制比和温度稳定性有明显提高.为支持电源管理芯片的休眠工作模式以降低待机功耗,电路中专门设置了一个辅助的微功耗基准,在正常模式下为电路提供偏置,在休眠模式中替代主基准以节省功耗.仿真结果表明,该基准源提供的1.27V基准电压在-20至120℃范围内的最大温漂为3.5mV.当供电电压由3V变化至40V时,基准电压的变化为56μV.在低于10kHz的频率范围内基准源具有大于100dB的电源抑制比.芯片采用1.5μm BCD(Bipolar-CMOS-DMOS)工艺设计与实现.实验结果证实上述设计目标已基本实现.
关 键 词:wide supply voltage range bandgap reference line regulation sleep mode micro power
分 类 号:TN432[电子电信—微电子学与固体电子学]
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