基于ZSP500的IDLE模块子系统级验证实现  

Subsystem verification of IDLE based on ZSP500

作　　者：袁艳[1] 申敏[1] 

机构地区：[1]重庆邮电大学,重庆400065

出　　处：《电子技术应用》2008年第8期48-50,54,共4页Application of Electronic Technique

摘　　要：SoC 系统的 RTL 级验证分为模块级、子系统级、系统级三个阶段。本文描述了高速数字信号处理器 ZSP500的基本结构和子系统级验证的具体概念,详细介绍了3G 手机芯片中的 IDLE 模块的结构,包括工作模式和空闲模式。介绍通过 ZSP500编程工具构造 SoC 子系统级验证的测试例,利用生成的目标文件对模块进行子系统级验证。最后得出基于 ZSP500的子系统级验证效率高并且实现简单的结论。This paper firstly introduces that RTL（Register Transfer Level） verification is divided three phases in SoC system, Block Level, Subsystem Level, System Level. It describes basic configuration of high speed Digital Signal Processor ZSP500 and the conception of Subsystem Level verification. It introduces work pattern and idle pattern of IDLE block in 3G mobile telephone. The main purpose of this paper is introduces how to configure SoC subsystem test-case through ZSP500, and using objective file verifies Block in Subsystem. Finally the paper receives conclusion that Subsystem verification efficiency of based on ZSP500 is very high and implemented easily.

关 键 词：RTL ZSPS00 TD-SCDMA IDLE 子系统级验证 

分 类 号：TP368.1[自动化与计算机技术—计算机系统结构] TP277.021[自动化与计算机技术—计算机科学与技术]