一种基于FPGA的高精度浮点运算处理器系统  

An High-precision Floating-point Operational Processor System Based on FPGA

作　　者：谢辉[1] 

机构地区：[1]武汉大学电子信息学院,湖北武汉430079

出　　处：《科技广场》2008年第7期183-185,共3页Science Mosaic

摘　　要：本文叙述了基于Spartan3型FPGA的流水线浮点处理器的设计。它是运用在设计流水线数据路径的新的控制器,这种设计提供了高水平的API和FPGA编程。控制器在处理器的设计中加上了多线程和网络,还有SIDM处理。FPGA实现高精度浮点运算是基于RUMP算法的有效实现的基础上的,RUMP算法是计算两个向量的点乘,其精度和运用包括不标准素数的单精度操作的双精度处理器。基于FPGA的处理器的性能超过了浮点DSP机。本设计提供了对FPGA的浮点系统的真实估计。This paper presents the design of a pipelined floatingpoint processor on a Spartan-Ⅲ FPGA. It is implemented as a coprocessor to a novel, universal controller for pipelined data path designs that provides a high-level API and compiler support forgeneral FPGA applications. The controller adds multithreading and networking to the processor design, and the option of SIMD processing. The complexity issue of high precision floating point in an FPGA implementation is taken care of by efficiently implementing a recent algorithm of Rump that point by computing of two vectors at the same level of precision as a double precision processor yet using single precision operations only including a few non-standard primitives. For these special operations, our FPGA based processor actually outperforms hardwired floating-point DSP chips performing them in software. Through the inclusion of sequential control and networking, our design provides a realistic estimate of the floating point system performance of FPGA in standard applications.

关 键 词：浮点处理器 高精度浮点运算 FPGA DSP 

分 类 号：TP202.2[自动化与计算机技术—检测技术与自动化装置]