DDS+PLL宽带频率合成器的设计与实现  

Wide-Band Frequency Synthesizer Based on DDS+PLL Designed and Achieved

作　　者：宋庆华[1] 徐正芳[1] 

机构地区：[1]中国电子科技集团公司第十三研究所,石家庄050051

出　　处：《半导体技术》2008年第8期734-736,共3页Semiconductor Technology

摘　　要：采用DDS＋PLL技术实现频率合成器,其特点是宽频带（3-6GHz）、小步进（1kHz）、低相位噪声,频率捷变。对其进行了理论分析,描述了宽频带和小步进的实现方式,相位噪声以及频率捷变的确定问题。频率合成器由DDS、锁相环路、压控振荡器、放大电路、参考信号和数据处理等电路组成。压控振荡器的信号经过功分、分频、下混频,滤波后和晶振信号在锁相环路进行鉴相,生成误差电压来控制VCO的频率,同时通过改变DDS的频率得到小步进、低相位噪声的输出信号。Wide-band frequency synthesizer based on DDS ＋ PLL technique was introduced. The analysis was carried through in theory aspect. The method of achieved band-wide and small frequency step were described. Frequency synthesizer was composed of DDS, phase locked loop, voltage controlled oscillator, power amplifier, crystal oscill~＇~tor and data circuit. The signal of VCO passed through power divider, fregnency divider, down-mixer, filter was compared with that of crystal oscillator in phase locked loop. An error voltage is produced and to control VCO frequency, At the same time, small frequency step and low phase noise is achieved by altering DDS frequency. So an output signal is achieved.

关 键 词：直接频率合成器 相位噪声 小步进 

分 类 号：TN604[电子电信—电路与系统]